MOTMap-415  > 1NA115BU

suppliers of 1NA115BU and PDF data of 1NA115BU

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
1NA115BU BB    04+    SOP-16 
1NA115BU BB    BGA    04+ 

1NA115BU Datasheet

Characteristic Symbol S2 A/AA S2 B/BA S2 D/DA S2 G/GA S2 J/JA S2 K/KA S2 M/MA Unit
Peak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage VRRM VRWM VR 50 100 200 400 600 800 1000 V
RMS Reverse Voltage VR(RMS) 35 70 140 280 420 560 700 V
Average Rectified Output Current @ TT = 1000C I(AV) 1.5 A
Non-Repetitive Peak Forward Surge Current 8.3ms single half sine-wave superimposed on rated load (JEDEC Method) IFSM 50 A
Forward Voltage @ IF = 1.5A VFM 1.15 V
Peak Reverse Current @TA = 250C at Rated DC Blocking Voltage @TA = 1250C IRM 5.0 125 UA
Typical Total Capacitance (Note l) CT 20 pF
Typical Thermal Resistance, Junction to Terminal (Note 2) RejT 20 oC/w
Operating and Storage Temperature Range TSTG -65 to +150 oC


1NA115BU Price
BP2, BPl, BPO: Block Protect Bits (Nonvolatile) The Block Protect Bits, BP2, BPl and BPO, determine which blocks of the array are write protected. A write to a protected block of memory is ignored. The block pro- tect bits will prevent write operations to one of eight segments of the array.
1NA115BU on stock
The MICRF500 is a single chip UHF transceiver designed for spread spectrum communication (FHSS) intended for ISM (Industrial, Scientific and Medical) and SRD (Short Range Device) frequency bands from 700MHz t0 1100MHz with FSK data rates up t0 128k baud. The transmitter consists of a PLL frequency synthesizer and a power amplifier. The frequency synthesizer consists of a voltage-controlled oscillator (VCO), a crystal oscillator, dual- modulus prescaler, programmable frequency dividers and a phase-detector. The loop filter is external for flexibility and can be a simple passive circuit. The VCO is a Colpitts oscillator which requires an external resonator and varactor. FSK modulation can be applied externally to the VCO. The synthesizer has two different N, M and A frequency dividers. FSK modulation can also be implemented by switching between these dividers (max. 2400bps). The lengths of the N and M and A registers are 12, 10 and 6 bits respectively. For all types of FSK modulation, data is entered at the DATAIXO pin (see application circuit). The output power of the power amplifier can be programmed to eight levels. A lock detect circuit detects when the PLL is in lock.
Collector to Base Voltage Collector to Emitter Voltage Emitter to Base Voltage Collector Current (DC) Maximum Power Dissipation Total Power Dissipation at 25 0C Ambient Temperature Maximum Temperatures Junction Temperature Storage Temperature Range
Figure l shows the basic block diagram and timing cycle for an am- plifier-sequenced receiver. Note that the bias to RF amplifiers RFA1 and RFA2 are independently controlled by a pulse generator, and