transfered to the Q outputs on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independently of the other inputs. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption. Power down protection is provided on all inputs and o t0 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V t0 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
51110-0460 Price| | | | | | | | | | | | VCE=-10 V Ic=-0.8 A Dutv-O.O(l |
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| Symbol | Parameter | Test Conditions | Min | Typ. | Max | Unit |
| Vo | Output Voltage | Tj= 25 0C | -23.5 | -24 | -24.5 | V |
| Vo | OutputVoltage | lo=-5mAto-1A Po" 15W Vi = -27 to -38 V | -23 | -24 | -25 | V |
| Vo+ | Line Regulation | Vi = -27 to -38 V Ti = 25 0C Vi = -30 to -36 V Tj = 25 0C | | | 480 240 | mV mV |
| o+ | Load Regulation | 10 = 5 t0 1500 mA Tj = 25 0C 10 = 250 t0 750 mA Tj = 25 0C | | | 480 240 | mV mV |
| Id | Quiescent Current | Tj= 25 0C | | | 3 | mA |
| d | Quiescent Current Change | lo = 5 t0 1000 mA | | | 0.5 | mA |
| d d | Quiescent Current Change | Vi = -27 to -38 V | | | 1 | mA |
| g Vo 7_ | OutputVoltage Drift | 10 =5 mA | | _1 | | mV/oC |
| eN | Output Noise Voltage | B = 10Hz t0 100KHz Tj = 25 0C | | 400 | | ccV |
| SVR | Supply Voltage Rejection | CVi =10 V f= 120Hz | 54 | 60 | | dB |
| Vd | Dropout Voltage | 10 =1 A Tj = 25 0C CVO = 100 mV | | 1.1 | | V |
| lsc | Short Circuit Current | | | 1.1 | | A |
| lscp | Short Circuit Peak Cunent | Tj= 25 0C | | 2.2 | | A |
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