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Serial Interface Description MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25P1024 always operates as a slave. TRANSMITTER/RECEIVER: The AT25P1024 has separate pins designated for data transmission (SO) and reception (SI). MSB: The Most Significant Bit (MSB) is the first bit transmitted and received. SERIAL OP-CODE: After the device is selected with CS going low, the first byte will be received. This byte contains the op-code that defines the operations to be performed. INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT25P1024, and the serial out- put pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication. CHIP SELECT: The AT25P1024 is selected when the CS pin is low. When the device is not selected, data will not be accepted via the Sl pin, and the serial output pin (SO) will remain in a high impedance state.