The X68C64 is internally organized as two independent planes of4K bytes of memory with the A12 input select- ing which of the two planes of memory are to be accessed. While the processor is executing code out of one plane, write operations can take place in the other plane, allowing the processor to continue execution of code out ofthe X68C64 during a byte or pagewrite to the device.
FDW6433 Price register. If bit 6 is a 0, then the data in the main memory page matches the data in the buffer. If bit 6 is a l, then at least one bit of the data in the main memory page does not match the data in the buffer.
FDW6433 on stock| Part Number | Temperature Range | Package |
| MIC2803BN | -40IC to +85IC | 18-pin DIP |
| MIC2803BWM | -40IC to +85IC | 18-pin wide SOIC |
| MIC2804BN | -40IC to +85IC | 18-pin DIP |
| MIC2804BWM | -40IC to +85IC | 18-pin wide SOIC |
| | |
| CHARACTERISTIC | SYMBOL | MIN | TYP | MAX | UNIT | TEST CONDICTIONS |
| Collector Cutoff Current | ICES | | | 0.5 | pA | VCE = 45 Vr RBE =O |
| Emitter Cutoff Current | IEBO | | | 0.5 | pA | VEB = 4.0 V,IC = O |
| DC Current Gain ' | hFE | 60 | | 200 | | VCE = 10 V,IC = 50 mA |
| Collector Saturation Voltage | VCE(satl | | 0.17 | 0.4 | V | IC = 500 mA. lB = 50 mA |
| Base Saturation Voltage | VBEtsat) | | 0.90 | 1.2 | V |
| Gain Bandwidth Product | fT | 300 | 380 | | MHz | VCE = 10 V, IE = -100 mA |
| Output Capacitance | Cob | | 6.7 | 10 | pF | VCB = 10 V.IE = O,f = 1.0 MHz |
| Turn-on Time | ton | | 20 | 40 | ns | IC = 500 mA |
| Storage Time . ' | tstg | | 55 | 80 | ns | IBl = -IB2 -. 50 mA |
| Turn-off Time | toff | | 72 | 100 | ns |
| | | | | | |
| | | | | | | | | | | |
| | | | | | ^ | | | | | |
| | | j | | | | | | | | |
| | | | | 1 | L | | | |
| | | 0 7 1 L | 1 L |
| | | | | | | | | | 1 | |
| | | | | | | | | | | |
| | | | | | Vce =5Y | | | | |
| | | | | | | | | | | |
| | | | | | | | | | |
