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GPHB201-1422A107A Datasheet

ABSOLUTE MAXIMUM RATINGS (TA = 250C unless otherwise noted)
Parameters	Symbol	Device	Value	Units
TOTAL DEVICE Storage Temperature	TSTG	All	-40 to +150	aC
Operating Temperature	I OPR	All	-40 to +85	aC
Lead Solder Temperature	TSOL	All	260 for 10 sec	aC
Junction Temperature Range	Tj	All	-40 to +100	aC
Isolation Surge Voltage(') (peak AC voltage, 60Hz, 1 sec duration)	VISO	All	7500	Vac(pk)
Total Device Power Dissipation @ 25aC			330	mW
Derate above 25aC	PD	All	4.4	mW/oC
EMITTER Continuous Forward Current	IF	All	60	mA
Reverse Voltage	VR	All	3	V
Total Power Dissipation 25aC Ambient			100	mW
Derate above 25aC	PD	All	1.33	mW/oC
DETECTOR Off-State Output Terminal Voltage	VDRM	MOC3010M/1M/2M MOC3020M/1M/2M/3M	250 400	v
Peak Repetitive Surge Current (PW = 1 ms, 120 pps)	ITSM	All	1	A
Total Power Dissipation @ 25aC Ambient			300	mW
Derate above 25aC	PD	All	4	mW/oC

GPHB201-1422A107A Price

Parameter	Symbol	Values	Unit
Reverse voltage	VR	50	V
Peak forward current, tp =1 c(s	IFRM	5	A
Total power dissipation	Ptot	350	mW
Junction temperature	Tj	1 75	C
Storage temperature range	Tstg	- 55+150
Operating temperature range	Top	- 55+150

GPHB201-1422A107A on stock

PARAMETERS	SYMBOL	TEST CONDITIONS	UC5180C		UNITS
PARAMETERS	SYMBOL	TEST CONDITIONS	MIN	MAX	UNITS
Propagation Delay - Low to High	tPLH	CL = 50pF, VIN = + 500mV		550	ns
Propagation Delay - High to Low	tPHL	CL = 50pF, VIN = + 500mV		550	ns
Acceptance Input Frequency	fA	Unused Input Grounded, VIN = +200mV		0.1	MHz
Rejectable Input Frequency	fR	Unused Input Grounded, VIN = +500mV	5.5		MHz

Pin No.	Symbol	I/O	Function
1	IN+	Input	Non-inverting Input of the internal opamp.
2	IN-	Input	Inverting Input of the internal opamp.
3	GS	Output	Gain Select of internal opamp. The opamp's gain should be set according to the nominal Vdd of the application using the information in Figure 10.
4	VRef	Output	Reference Voltage. Nominally VDD/2. It is used to bias the input opamp.
5	CAP		Capacitor. A O.lmF decoupling capacitor should be connected across this pin and vss.
6	TRIGin	Trigger Input	Trigger Input. Schmitt trigger buffer input. Used for line reversal and ring detection.
7	TRIGRC	Open Drain Output / Schmitt Input	Trigger RC. Used to set the (RC) time interval from TRIGin going low to TRIGout going high. An external resistor connected to VDD and capacitor connected to vss determine the duration of the (RC) time interval.
8	TRIGout	CMOS Output	Trigger Out. Schmitt trigger buffer output. Used to indicate detection of line reversal and/or ringing.
9	MODE	CMOS Input	3-wire interface: Mode Select. When low, selects FSK data interface mode 0. When high, selects FSK data interface mode l. See pin 16 (DCLK) description to understand how MODE affects the DCLK pin.
10	OSCI	Input	Oscillator Input. A 3.579545MHz crystal should be connected between this pin and OSCO. It may also be driven directly from an external clock source.
11	Osc0	Output	Oscillator Output. A 3.579545MHz crystal should be connected between this pin and OSCI. When OSCI is driven by an external clock, this pin should be left open.
12	Vss		Power Supply Ground.
13	IC		Internal Connection. Must be connected to vss for normal operation.
14	PWDN	Schmitt Input	Power Down. Active high. When high, the device consumes minimal power by disabling all functionality except TRIGin, TRIGRC and. TRIGout Must be pulled low for device operation.