| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
|
IDT70T633S10BFI Datasheet 650MHz -3dB Small Signal Bandwidth 400MHz -3dB 2Vp_p Large Signal Bandwidth 150MHz +O.ldB Bandwidth High Slew Rate: 2500Vkes Fixed Gain of 2 Requires No External Resistors -75dB Channel Separation at 10MHz -50dB Channel Separation at 100MHz -77dB 2nd Harmonic Distortion at 10MHz, 2Vp_p -73dB 3rd Harmonic Distortion at 10MHz, 2Vp_p Low Supply Current: 8mA per Amplifier 6ns 0.1% Settling Time for 2V Step TTL Compatible Enable lss " lOO when Disabled Differential Gain of 0.01 %, Differential Phase of o.oi Y Wide Supply Range:.25V (4.5V) to±6V (12V) Available in 16-Lead SSOP Package IDT70T633S10BFI Price REGISTER ENABLE-When the Register Enable (pin 19) is high (hold mode) the digital data in the input register will be latched, and when the Register Enable is low (track mode), the converter's out- put will follow its input. In order to latch new digital data into the register, the Register Enable must golow for a minimum of 60nsec and digital input data must be valid for a minimum of 40nsec prior to Register Enable going high again. See Timing Diagram. IDT70T633S10BFI on stock ' x = l ! q P d P O } l U ! S y L u g Z e A P u l s u ! d ( 9 ) ' x = l ! q P d P O > l U ! S y L U O L a A P U I s u ! d ( 9 ) I n d l n o s P p a i n 6 ! l u o o U a L I M U ! P l p - u a d o a i P s u ! d ( ) a O ! A a p d n - l l n d e l q P i n 6 ! L u o o a I P M I L O S a A P L j s u d e ' a O ! A a p d n l l n d P a I P 1 6 a l u ! a A P L I s u ! d ( Z ) I n N 2 3 6 4 m |
