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. HIGH PERFORMANCE E2CMOS~ TECHNOLOGY - fmax = 125 MHz Maximum Operating Frequency - tpd = 7.5 ns Propagation Delay - Enhanced tsu2 = 7 ns, tsu3 (CLKO/1) = 4.5ns, tsu3 (CLK2/3) = 3.5ns - TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels - Electrically Erasable and Reprogrammable - Non-Volatile - Programmable Speed/Power Logic Path Optimization * IN-SYSTEM PROGRAMMABLE - Increased Manufacturing Yields, Reduced Time-to- Market, and Improved Product Quality - Reprogram Soldered Devices for Faster Debugging . 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE AND 3.3V IN-SYSTEM PROGRAMMABLE . ARCHITECTURE FEATURES - Enhanced Pin-Locking Architecture with Single- Level Global Routing Pool and SuperWIDE GLBs - Wrap Around Product Term Sharing Array Supports up t0 35 Product Terms Per Macrocell - Macrocells Support Concurrent Combinatorial and Registered Functions - Macrocell Registers Feature Multiple Control Options Including Set, Reset and Clock Enable - Four Dedicated Clock Input Pins Plus Macrocell Product Term Clocks - Slew and Skew Programmable l/0 (SASPI/OTM) Supports Programmable Bus Hold, Pull-up, Open Drain and Slew and Skew Rate Options - Six Global Output Enable Terms, Two Global OE Pins and One Product Term OE per Macrocell