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Flip Flop The ATF1516AS's flip flop has very flexible data and con- trol functions. The data input can come from either the XOR gate, from a separate product term or directly from the l/0 pin. Selecting the separate product term allows cre- ation of a buried registered feedback within a combinatorial output macrocell. (This feature is automatically imple- mented by the fitter software). In addition to D, T, JK and SR operation, the flip flop can also be configured as a flow- through latch. In this mode, data passes through when the clock is high and is latched when the clock is low. The clock itself can either be the Global CLK Signal (GCK) or an individual product term. The flip flop changes state on the clock's rising edge. When the GCK signal is used as the clock, one of the macrocell product terms can be selected as a clock enable. When the clock enable function is active and the enable signal (product term) is low, all clock edges are ignored. The flip flop's asynchronous reset signal (AR) can be either the Global Clear (GCLEAR), a product term, or always off. AR can also be a logic OR of GCLEAR with a product term. The asynchronous preset (AP) can be a product term or always off.