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N74CBT3384ADBR Datasheet

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1C Output Drivers (4) 14 13 12 11


N74CBT3384ADBR Price
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N74CBT3384ADBR on stock

Parameters Test Conditions Symbol Min Typ Max Unit
Output power variation for the full temperature range Tamb = -400C to +850 C, Vs = 3.0 V Vs = 2.0 V APRef APRef 1_5 -4O dB dB
Output power variation for the full temperature range Tamb = -400C to +1250 C, Vs = 3.0 V Vs = 2.0 V, POut = PRef + APRef APRef APRef -2.0 -4.5 dB dB
Achievable output-power range Selectable by load impedance POut_typ -3 +5.5 dBm
Spurious emission fCLK = fo/128 Load capacitance at Pin CLK = 10 pF fo +ix fCLK fo +4 x fCLK other spurious are lower -52 -52 dBc dBc
Oscillator frequency XTO (= phase comparator frequency) fXTO = fo/32 fXTAL = resonant frequency of the XTAL, CM {10 fF, load capacitance selected accordingly Tamb = -400C to +85aC, Tamb = -400C to +1250C fXTO -30 -40 fXTAL +30 +40 ppm ppm
PLL loop bandwidth 250 kHz
Phase noise of phase comparator Referred to fPC = fXTO, 25 kHz distance to carrier -116 -110 dBc/Hz
In loop phase noise PLL 25 kHz distance to carrier -80 -74 dBc/Hz
Phase noise VCO at l MHz at 36 MHz -89 -120 -86 -117 dBc/Hz dBc/Hz
Frequency range of VCO fvco 868 928 MHz
Clock output frequency (CMOS microcontroller compatible) fo/256 MHz
Voltage swing at Pin CLK CLoad <10 pF VOh Vol VSX0 8 VSX0 2 V V
Series resonance R of the crystal Rs 1 10 Q
Capacitive load at Pin XTO 7 pF
FSK modulation frequency rate Duty cycle of the modulation signal = 50% O 32 kHz
ASK modulation frequency rate Duty cycle of the modulation signal = 50% O 32 kHz
ENABLE input Low level input voltage High level input voltage Input current high Vll Vlh lln 1.7 0.25 20 V V l.tA
PA_ENABLE input Low level input voltage High level input voltage Input current high Vll Vlh 11n 1.7 0.25 VS(1) 5 V V UA


F(MHz) ZIN ZLOAD(fl)
1450 2.2 +j5.0 3O-3.8
1500 2.7 +j4.-5 2.2 - j4.0
1550 2.1+ j3.7 1.5- j4.1