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(V=Valid, X=Don't Care, H=Logic High, L=Logic Low) NOTES : 1. OP Code : Operand Code AO ~ A12 & BAO ~ BAl : Program keys. (@MRS) 2. MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are the same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. Partial self refresh can be issued only after setting partial self refresh mode of EMRS. 4. BAO ~ BAl : Bank select addresses. 5. During burst read or write with auto precharge, new read/write command can not be issued. Another bank read/write command can be issued after the end of burst. New row active of the associated bank can be issued at tRP after the end of burst. 6. Burst stop command is valid at every burst length. 7. DQM sampled at the positive going edge of CLK masks the data-in at that same CLK in write operation (Write DClM latency is O), but in read operation, it makes the data-out Hi-Z state after 2 CLK cycles. (Read DQM latency is 2).
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