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N74F366D Datasheet
MIC5016 and MIC5017 dual MOSFET drivers are designed for gate control of N-channel, enhancement-mode, power MOSFETs used as high-side or low-side switches. The MIC5016/7 can sustain an on-state output indefinitely. The MIC5016/7 0perates from a 2.75V t0 30Vsupply. In high- side configurations, the driver can control MOSFETs that switch loads of up t0 30V. In low-side configurations, with separate supplies, the maximum switched voltage is limited only by the MOSFET. The MIC5016/7 has two TTL compatible control inputs. The MIC5016 is noninverting while the MIC5017 is inverting. The MIC5016/7 features internal charge pumps that can sustain gate voltages greater than the available supply voltage. The driver is capable of turning on logic-level MOSFETs from a 2.75V supply or standard MOSFETs from a 5V supply. Gate-to-source output voltages are internally limited to approximately 15V. The MIC5016/7 is protected against automotive load dump, reversed battery, and inductive load spikes of -20V. The driver's overvoltage shutdown feature turns off the external MOSFETs at approximately 35V to protect the load against power supply excursions. The MIC5016 is an improved pin-for-pin compatible replace- ment in many MIC5012 applications. The MIC5016/7 is available in plastic 14-pin DIP and 16-pin SOIC pacakges.
N74F366D Price

Ta:250C
f:i MHz VR:OV
n:10pcs
~VE:21 59pt


N74F366D on stock

B RSTN I PHIS System reset ( active low )
B_GP_OUT[l:0] 0 PHOB2 General purpose output
B_BMODE[l:0] I PHIC TeakLite boot mode selection [0] = simple reset [1] = boot from Host CPU ( normal mode ) [2] = boot from JTAG ( emulation mode ) [3] = self-booting ( test mode )
Board / PLL B TMODE I PHIC Test Mode Enable (DSP view, Scan Test, Memory BIST, PLL Test) [0] Normal, [1] Test Mode
interface B NMODE I PHIC NAND tree test mode [0] Normal, [1] NAND tree test mode
B NTR B PHTBCT4 ATM Network Timing Reference
B EXT CLK I PHIC external clock
B MSC CLK I PHIC misc. clock for BIRA test
P XTAL IN I XTAL input for clock.
P XTAL OUT 0 PHSOSCM26 XTAL output for clock.
P PLL FILTER 0 POAR50 ABB Internal PLL pump out connected to filter.


Off state cathode loff O001 1O ltA VKA = 16 V, Vref = 0 V
current
Dynamic ZKA O2 0.5 Q VKA= Vref,
impedance IK = 1 mA t0 50 mA
Bypass resistance Rps 1.6 2.0 2.4 kQ JPs =1 mA 3
Bypass resistance ARps/ATa +2000 ppm/oC IPs=1 mA, 3
temperature OoC t0 500C gradient
coefficient