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N74F573D-T3 N74F573D-T3 N74F573DT3 Datasheet

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N74F573D-T3 N74F573D-T3 N74F573DT3 Price

Symbol
Collector-base voltage V
Collector-emitter voltage v
Emitter-base voltage v
ic
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Tj oc
Storage temperature Tstg oc


N74F573D-T3 N74F573D-T3 N74F573DT3 on stock

SYMBOL PARAMETER CONDITIONS MIN MAX UNIT
ICBO collector cut-off current IE = 0; VCB = -50 V -10 nA
IE = 0; VCB = -50 V; Tamb = 125 IC -10
IEBO emitter cut-off current lc = 0; VEB = -5 V -50 nA
hFE DC current gain lc = -0.1 rTiA; VCE = -1 V 75
lc = -1 rriA; VCE = -1 V 100
lc = -10 fliA; VCE = -1 V 100
lc = -150 mA; VCE = -2 V 100 300
lc = -500 mA; VCE = -2 V 50
VCEsat collector-emitter saturation lc = -150 mA; lB = -15 mA -400 mV
voltage lc = -500 mA; lB = -50 mA -1.6 V
VBEsat base-emitter saturation voltage lc = -150 mA; lB = -15 mA -1.3 V
lc = -500 mA; lB = -50 mA -2.6 V
Ce collector capacitance IE = ie = 0; VCB = -10 V; f= 1 MHz 8 pF
Ce emitter capacitance lc = ic = 0; VEB = -500 mV; f= 1 MHz 35 pF
fT transition frequency lc = -20 rriA; VCE = -10 V; f = 100 MHz 200 MHz
Switching times (between 10% and 90% levels); (see Fig.2)
ton turn-on time ICon = -150 mA; IBon = -15 mA; 40 ns
td delay time IBo = 15 mA 12 ns
tr rise time 30 ns
toff turn-off time 365 ns
ts storage time 300 ns
tf fall time 65 ns


Several new features make the LT1 1 75 very user-friendly. The SHDN pin can inteyface directly to either positive or negative logic levels. Current limit is user-selectable at 200mA, 400mA, 600mA and 800mA The output can be forced to reverse voltage without damage or latchup. Unlike some earlier designs, the increase in quiescent current during a dropout condition is actively limited.