N74F804D N74F804D N74F804D Datasheet| Characteristic | Symbol | Value 0,2) | Unit | | Thermal Resistance, Junction to Case Case Temperature 800C, 85 W CW Case Temperature 760C, 20 W CW | RejC | 0.50 056 | OC/w | | | | | N74F804D N74F804D N74F804D Price| | | | Fopt | | | Freq (GHz) | NFmin (dB) | Ga (dB) | MAG | ANG. (deg.) | Rn50 | | 2.0 | 0 32 | 16 5 | 0.77 | 15 | 0.19 | | 4.0 | 0 35 | 15 5 | 0.58 | 43 | 0.18 | | 6.0 | 0 40 | 14 2 | 0.43 | 82 | 0.13 | | 8.0 | 0 46 | 13 1 | 0.32 | 127 | 0.08 | | 10 0 | 0 56 | 12 0 | 0.27 | 175 | 0 07 | | 12 0 | 0 67 | 10 9 | 0.27 | -139 | 0 10 | | 14 0 | 0 80 | 9.9 | 0.34 | -100 | 0.17 | | 16 0 | 0 94 | 8.9 | 0.48 | -70 | 0 29 | | 18 0 | 1 10 | 8.0 | 0.69 | -56 | 0 46 | | | | | | | N74F804D N74F804D N74F804D on stock| DIL16 Pinout | S016 Pinout | Name | Description | | 1 | 1 | VSSD | Digital negative supply voltage | | 3 | 4 | VOUT | Output of the interface circuit after gain stage | | 4 | 5 | VM | Unbuffered output of the charge compensation loop | | 5 | 6 | GAIN | Gain adjustment | | 6 | 7 | CF | A capacitance Cfext for bandwidth adjustment may be connected between pins CF and VM | | 8 | 8 | OFADJ | Offset adjustment or connected to AGND | | 9 | 9 | AGND | Internally generated GROUND signal (Rint = 3kl ). lts value is 0.5(VDD+VSSA) | | 11 | 10 | VSSA | Analog negative supply voltage | | 12 | 11 | C2 | To be connected to the lower sensor electrode | | 13 | 12 | CM | To be connected to the common sensor electrode | | 14 | 13 | C1 | To be connected to the upper sensor electrode | | 16 | 16 | VDD | Positive supply voltage | | 2,7,10,15 | 2,3,14,15 | NC | Not connected | | | | |
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