N74LS139AN Datasheet| | | Speed Bins | | | Parameter List | Symbol | 55ns | 70ns | Units | | Min | Max | Min | Max | | | Read cycle time | tRC | 55 | | 70 | | ns | | Address access time | tAA | | 55 | | 70 | ns | | Chip select to output | tco | | 55 | | 70 | ns | | Output enable to valid output | tOE | | 25 | | 35 | ns | | LB, UB valid to data output | tBA | | 55 | | 70 | ns | | Chip select to low-Z output | tLZ | 10 | | 10 | | ns | | Read | Output enable to low-Z output | tOLZ | 5 | | 5 | | ns | | LB, UB enable to low-Z output | tBLZ | 10 | | 10 | | ns | | Output hold from address change | tOH | 10 | | 10 | | ns | | Chip disable to high-Z output | tHZ | O | 20 | 0 | 25 | ns | | OE disable to high-Z output | tOHZ | 0 | 20 | 0 | 25 | ns | | UB, LB disable to high-Z output | tBHZ | O | 20 | O | 25 | ns | | | Write cycle time | twc | 55 | | 70 | | ns | | Chip select to end of write | tcw | 45 | | 60 | | ns | | Address set-up time | tAS | O | | 0 | | ns | | Address valid to end of write | tAW | 45 | | 60 | | ns | | Write pulse width | tWP | 40 | | 50 | | ns | | Write | Write recovery time | tWR | O | | 0 | | ns | | Write to output high-Z | tWHZ | O | 20 | 0 | 20 | ns | | Data to write time overlap | tDW | 25 | | 30 | | ns | | Data hold from write time | tDH | O | | 0 | | ns | | End write to output low-Z | tow | 5 | | 5 | | ns | | LB, UB valid to end of write | tBW | 45 | | 60 | | ns | | | | | | | | |
N74LS139AN Price| | | | | 7C109B-20 7C1009B-20 | 7C109B-25 7C1009B-25 | 7C109B-35 7C1009B-35 | | | Parameter | Description | Test Conditions | Min | Max | Min | Max | Min | Max | Unit | | VOH | Output HIGH Voltage | Vcc = Min., IOH = -4.0 mA | | 2.4 | | 2.4 | | 2.4 | | V | | VOL | Output LOW Voltage | Vcc = Min., IOL = 8.0 mA | | | 0.4 | | 0.4 | | 0.4 | V | | VIH | Input HIGH Voltage | | | 2.2 | Vcc + 0.3 | 2.2 | Vcc + 0.3 | 2.2 | Vcc + 0.3 | V | | VIL | Input LOW Voltage['] | | | -0.3 | 0.8 | -0.3 | 0.8 | -0.3 | 0.8 | V | | IIX | Input Load Current | GND< Vi< Vcc | | -1 | +1 | 1 | +1 | -1 | +1 | | | 102 | Output Leakage Current | GND < Vi< Vcc, Output Disabled | | -5 | +5 | -5 | +5 | -5 | +5 | oA | | IOS | Output Short r,i Circuit Current[3] | Vcc = Max., VOUT = GND | | | -300 | | -300 | | -300 | mA | | lcc | Vcc Operating Supply Current | Vcc = Max., IOUT = 0 mA, f = fMAX = 1/tRC | | | 75 | | 70 | | 60 | mA | | ISB1 | Automatic CE Power-Down Current -TTL Inputs | Max. Vcc, CEi > VIH or CE2 < VIL, VIN > VIH or VIN < VIL, f = fMAX | | | 30 | | 30 | | 25 | mA | | ISB2 | Automatic CE | Max. Vcc, | | | 10 | | 10 | | 10 | mA | | Power-Down Current -CMOS Inputs | CEi > Vcc - 0.3V, or CE21 0.3V, VIN > VCC - 0.3V, or VIN < 0.3V, f = 0 | L | | 2 | | | | | mA | | | | | | | | | | | |
N74LS139AN on stock Note l: Absolute Maximum Ratings are those values beyond which the of a device may be impaired. Note 2: +1 LSB = +0.0015% of full scale = +1 5.3ppm of full scale. Note 3: Using internal feedback resistor. Note 4: Guaranteed by design, not subject to test. Note 5: I(OUTl) with DAC register loaded to all Os. Note 6: Typical temperature coefficient is l OOppmflC. Note 7: IOUTl load = 100 I in parallel with 13pF. Note 8: T0 0.0015% for a full-scale change, measured from the falling edge of LD. | uvGLAss BuLB CATHODE 5x12 F·÷0 | ANODE LEAD j CATHODE LEAD }/ i | | V| | I | | | j | | | | | /ANOD = | | 8 | 4 | | | 32 MIN | | | 44 MAX | | | ANODE (Side View) | | /L:ATHODE l. 18MAX. | LEAD:0.7 | | | | | | | |
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