| q | | | |
| | | | | j |
| | | | 7 -j | } |
| | | | j | -lOOccA |
| | | | |
| | | | | -50c(A |
| | | | IB=O |
| | | | |
In the low data rate mode, the PWIDTH pin sets the width of the ON pulse tPWi to RFAl with a resistor to ground (the ON pulse width tPW2 to RFA2 is set at l.1 times the pulse width to RFAl in the low data rate mode). The ON pulse width tPWl can be adjusted between 0.55 and l ps. However, when the PWIDTH pin is connected to Vcc through a l M resistor, the RF amplifiers operate at a nominal 50%-50% duty cycle, facilitating high data rate operation. In this case, the RF amplifiers are controlled by the PRATE resistor as de- scribed above.
