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N87C257-15OUIO Datasheet

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CLEAR CLOCK A B 1 16 2 15 3 14 4 13 V CC~LE~R CARRY OUT QA QB CLCCK (2) CTR4 2R G3 G4 >C2/1,3.4 -i
c 5 12 Qc A(3) 1,2D A
D QD e(4) B
PE 7 10 TE c D
GND 8 9 LOAD (15) CARRY
4CT=1 5
LC12522


N87C257-15OUIO Price
Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both Ml and M2. Releasing the pin allows an internal l.2~A current source to charge up an external soft-start capacitor Css. When this voltage reaches l.5V, the controller turns on and begins switch- ing, but with the ITH voltage clamped at approximately 0.6V below the RUN/SS voltage. As Css continues to charge, the soft-start current limit is removed.
N87C257-15OUIO on stock
Figure 2 shows a typical application of the MAX4456 (PDIP) with MAX497 quad, gain-of-two buffers at the outputs to drive 75Q loads. This application shows the MAX4456 digital-switch control interface set up in the 7- bit parallel mode. The MAX4456 uses seven data lines and two control lines (WR and LATCH). Two additional lines may be needed to control CE and LOAD when using multiple MAX4456s.

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vIN = IZV