NACH101M6.3V6.3X6.3TR13F Datasheet| | | | | | | | | | | | | | | | | | | | | | | D= 0.7f nn Er | | | | | | | | | | | | | | | 1? | | | | u - U.JU | | | | | | | | | | | | | | | | | | D = 0.33 :D = 0.2F | 7 | | | | | | | | | | | | | if | | | -D = 0.2r | | | | | r | | | | | | | | | | | | | | | | | | | PL 9 | | | | | | | | 11 | | r | | | | | ______ | | | | | | ..DutyfactorD= t l/t2- | | | | | | | | | | | 2 | PeakTj=POMxZthjC+ | C | | | | | | | | | | | | | | | | | | | | | | | | | NACH101M6.3V6.3X6.3TR13F Price| | | Test Condition | Va | ue | | | Symbol | Parameter | | | -40 t0 85 0C | -55 t0 125 0C | Unit | | vcc (v) | Min | Max | Min | Max | | VIH | High Level Input | 1.65 t0 1.95 | | 0.65Vcc | | 0.65Vcc | | V | | Voltage | 2.3 t0 2.7 | 1.7 | | 1.7 | | | 2.7 t0 3.6 | 2 | | 2 | | | VIL | Low Level Input | 1.65 t0 1.95 | | | 0.35Vcc | | 0.35Vcc | V | | Voltage | 2.3 t0 2.7 | | 0.7 | | 0.7 | | 2.7 t0 3.6 | | 0.8 | | 0.8 | | VOH | High Level Output | 1.65 t0 3.6 | lo=-l00cA | Vcc-0.2 | | Vcc-0.2 | | V | | Voltage | 1.65 | lo=-4 mA | 1.2 | | 1.2 | | | 2.3 | lo=-8 mA | 1.7 | | 1.7 | | | 2.7 | lo=-12 mA | 2.2 | | 2.2 | | | 3.0 | lo=-18 mA | 2.4 | | 2.4 | | | 3.0 | lo=-24 mA | 2.2 | | 2.2 | | | VOL | Low Level Output | 1.65 t0 3.6 | 10=100cA | | 0.2 | | 0.2 | V | | Voltage | 1.65 | 10=4 mA | | 0.45 | | 0.45 | | 2.3 | 10=8 mA | | 0.7 | | 0.7 | | 2.7 | 10=12 mA | | 0.4 | | 0.4 | | 3.0 | 10=24 mA | | 0.55 | | 0.55 | | l J | Input Leakage Current | 3.6 | VI=0 t0 5.5V | | ±5 | | ±5 | ccA | | loff | Power Off Leakage Current | 0 | Vi or Vo = 5.5V | | 10 | | 10 | ocA | | loZ | High Impedance Output Leakage Current | 3.6 | VI = VIH orVIL VO = 0 t0 5.5V | | ±5 | | ±5 | | | lcc | Quiescent Supply | | Vl = Vcc or GND | | 10 | | 10 | | | Current | 3.6 | Vi or Vo = 3.6 to 5.5V | | ±10 | | ±10 | | | clcc | lcc incr. per Input | 2.7 t0 3.6 | VIH = Vcc-0.6V | | 500 | | 500 | cA | | | | | | | | | | NACH101M6.3V6.3X6.3TR13F on stock| Pin No. | Mnemonic | Description | | 1 2, 5, 14, 21 3 4 6 7 8, 11, 17, 24 9 10 12 13 15 16 18 19 20 22 23 | OPD Vs- -IN A +IN A -OUT A +OUTA Vs+ +OUT B -OUT B +OUTC -OUT C +IN C -IN C VOCMC VOCMB VOCMA +IN B -IN B | Output Pull-Down Negative Power Supply Voltage Inverting Input, Amplifier A Noninverting Input, Amplifier A Negative Output, Amplifier A Positive Output, Amplifier A Positive Power Supply Voltage Positive Output, Amplifier B Negative Output, Amplifier B Positive Output, Amplifier C Negative Output, Amplifier C Noninverting Input, Amplifier C Inverting Input, Amplifier C Voltage Applied to This Pin Controls Output Common-Mode Voltage, Amplifier C Voltage Applied to This Pin Controls Output Common-Mode Voltage, Amplifier B Voltage Applied to This Pin Controls Output Common-Mode Voltage, Amplifier A Noninverting Input, Amplifier B Inverting Input, Amplifier B | | | |
To accumulate BER data, the user toggles the LC bit at T = 0. This clears the accumulators and loads the contents into the count registers. At T = 0, these results should be ignored. At this point, the device is counting bits and bit errors. At the end of the specified time interval, the user toggles the LC bit again and reads the count registers. These are the valid results used to calculate a bit error rate. Remember, the bit counter is really counting clocks, so in nibble and byte modes the bit counter value needs to be multiplied by 4 0r 8 to get the correct bit count. For longer integration periods, the results of multiple read cycles N have to be accumulated in software. |