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PC36UD60V25CP12 Datasheet

Parameter Max Units
ID@Tc= 25C Continuous Drain Current, VGS @ 10V 28 A
ID @ Tc = 1000C Continuous Drain Current, VGS @ 10V 20
IDM Pulsed Drain Current 110
PD @Tc= 25C Power Dissipation 68 W
Linear Derating Factor 0.45 w/oC
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy~ 110 mJ
IAR Avalanche Current 16 A
EAR Repetitive Avalanche Energy01 6 8 mJ
dv/dt Peak Diode Recovery dv/dt 5 0 V/ns
Tj TSTG Operating Junction and Storage Temperature Range -55 to +175 oC
Soldering Temperature, for 10 seconds 300 (1.6mm from case )


PC36UD60V25CP12 Price

lParameter Description Min Typ Max Unit
lVDD Supply voltage 2.3 2.5 2.7 v
l vQ /0 supply voltage 2.3 2.5 2.7 v
lVREF Reference voltage 1.15 1.25 1.35 V
l v 'Termination voltage VREF - 0.04 VREF VREF+ 0.004 V
lVI nput voltage 0 VDD v
lVIH(DC DC input high voltage VREF+ 0.15 v
lVIH(AC) Ac input high voltage VREF+ 0.31 V
lVIL(DC .DC input low voltage Data Inputs VREF - 0.15 V
lVIL(AC) AC input low voltage VREF - 0.31 v
lVIH nput high voltage level 1.7 v
lVI nput low voltage level RESETB 0.7 V
lVI Common mode input range CLK 0.97 1.53 V
lVID Differential input voltage CLKB 0.36 v
lVI Cross-point voltage of differential clock pair (VDD0/2) - 0.2 (VDD0/2) +0.2 v
lIOH High-Ievel output current -20 mA
l Il Low-Ievel output current 20 mA
lTA Operating free-air temperature 0 70 aC


PC36UD60V25CP12 on stock
Gate-EmitterThreshold Voltage VGE(th) IC = 10mA, VCE = 10V 4.5 6.0 7.5 Volts Collector-Emitter Saturation Voltage VCE(sat) lC = 100A, VGE = 15V - 2.1 2.8" Volts
The switching no:se appears as a fixed pattern which is spa- tially random except that it may have a slight l, 2, 3, 4 pattern because alternate diodes are sampled on different phases of an internally-ganarated, four-phase clock. Fixed pattern noise is largely removed by differential readout; its residual amplitude will typically be l% of the saturation level at a 40 ms integration time.