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PC68HC908QY4CDW Datasheet
Featuring a full differential input, 450MHz gain- bandwidth product, and a 325V/ys slew rate, the Model 3520 FET input operational amplifier is spec- ifically designed for condi- tioning of wideband data signals and pulses. A single compensation capacitor allows the performance of the amplifer to be tailored to the application by optimizing the bandwidth, slew rate or settling time. With a+lOV step settling time of 250ns to +0.01% and a +50mA output current drive at +10V, the
PC68HC908QY4CDW Price

Tooth Height: .200 in. (5,06 mm) min.
Tooth Width: .100 in. (2,54 mm) min.
Tooth Spacing: .400 in. (10,16 mm) min.
Target Thickness: .250 in. (6,35 mm)


PC68HC908QY4CDW on stock

J 1 6
D D G 0 5 4 D D S SC14195p


Parameter Symbol Limit Unit
Drain-Source Voltage VDS 20 V
Gate-Source Voltage VGS +12 V
Drain Current_Continuousa @TJ=1250C ID +6.0 A
_Pulsed b (300ms Pulse Width) IDM +35 A
Drain-Source Diode Forward Current a Is 1.7 A
Maximum Power Dissipation a PD 2 w
Operating Junction and Storage Temperature Range TJ, TSTG -55 t0150 C