Fully Standard Synchronous Dynamic RAM, with all signals referenced to a positive clock edge Dual internal banks controlled by BAO (Bank Select) Programmable Wrap sequence (Sequential / Interleave) Programmable burst length (1, 2, 4, 8 and 16) Read latency (2) ..Prefetch Read latency (4) coAuto precharge and without auto precharge wAuto refresh and Self refresh ..Single 3.3 V + 0.3 V power supply Interface: LVTTL Refresh cycle: 4K cycles / 64 ms 168-pin dual in-line memory module (Pin pitch = 1.27 mm) Unbuffered type Serial PD
PC74F244D on stock| | | ~MSG | | VDS = 3V ID = 10 mA |
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