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PC74HC08T-SMD PC74HC08T-SMD PC74HC08TSMD Datasheet

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PC74HC08T-SMD PC74HC08T-SMD PC74HC08TSMD Price

CONDITION	MIN	MAX
Supply voltage	-0.3V	+7V
Voltage range digital inputs	GND -0.3V	VDD +0.3V
Master Clock Frequency		50MHz
Operating temperature range, TA	-250C	+850C
Storage temperature after soldering	-650C	+1 500C

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Interrupt Control A single active-LOW interrupt output (INTRN) is provided which is activated upon the occurrence of any of eight internal events. Associated with the interrupt system are the Interrupt Mask Register (IMR) and the Interrupt Status Register (ISR). The IMR may be programmed to select only certain conditions to cause INTRN to be asserted. The ISR can be read by the CPU to determine all currently active interrupting conditions.

BP2, BPl, BPO: Block Protect Bits (Nonvolatile) The block protect bits, BP2, BPl and BPO, determine which blocks of the array are write protected. A write to a protected block of memory is ignored. The block pro- tect bits will prevent write operations to one of eight segments of the array.

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