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PC74HC138P652 PC74HC138P652 PC74HC138P652 Datasheet

Symbol Parameter Value Unit
VCES Collector-Emitter Voltage (VBE = 0) 800 V
VCEO Collector-Emitter Voltage (lB = 0) 400 V
VEBO Emitter-Base Voltage (lc = 0) 9 V
lc Collector Current 5 A
ICM Collector Peak Current (tp < 5 ms) 8 A
lB Base Current 2 A
IBM Base Peak Current (tp < 5 ms) 4 A
Ptot Total Dissipation at Te = 25 0C 70 W
Tstg Storage Temperature -65 t0 150 Oc
Ti Max. Operating Junction Temperature 1 50 OC


PC74HC138P652 PC74HC138P652 PC74HC138P652 Price
Clock Generation TSYNC I Transmit synchronization clock. This signalis used to synchronize the transmit clocks and the converter clocks to an external terminal/ bit-rate clock. It is used in the V.32 TSYNC and Asynchronous TSYNC modes and is ignored in other operating modes. The frequency of the external clock must be programmed in Control Register 0. This pin must be tied high or low ifit is not being used. TBIT O Transmit bit rate clock. This is an output clock whose frequency is programmable via Control Register 3. It is synchronized with the TCONV clock. TBAUD O Transmit baud rate clock. This is an output clock whose frequency is programmable via Control Register 3. It is synchronized with the TCONV clock.
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vs = +15V Typical production distribution of packaged
units. Single, dual, and quad units included.
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Instructions that involve data transactions on DQ3 1-0, and are therefore executed on a subsequent Read or Write cycle with the /AV line LOW, are all Read/Write Memory and Read/Write Register instructions, Read Validity, Write PA3-0. All other instructions are executed in a single cycle with the state of DQ13 being interpreted as the state ofthe /W line during the equivalent hardware control state.