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PC74HCT280T PC74HCT280T PC74HCT280T Datasheet

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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CHARACTERISTICS		SYMBOL	BR1005	B R101	B R102	B R104	BR106	BR108	B R1010	UNITS
Maximum Forward Voltage Drop per element at 5.OA DC		VF	1 1							Volts
Maximum Reverse Current at Rated	@TA= 25C	lR	10							uAmps
DC Blocking Voltage per element	@Tc= 100C	lR	0 2							mAmps

PC74HCT280T PC74HCT280T PC74HCT280T on stock

			·10		-12
	Symbol	Parameter	Min	Max	Min	Max	Unit -
READ CYCLE
1	tRC	Read Cycle Time	1 00		120		ns
2	tAA	Add ress Access Time		100		120	ns
3	tACS	Chip Select Access Time		100		120	ns
4	tOE	Output Enable to Output Valid		50		60	ns
5	tCLZ	Chip Select to Output in Low Z	10		10		ns
6	tOLZ	Output Enable to Output in Low Z	5		5		ns
7	tCHZ	Chip Disable to Output in High Z	0	35	0	40	ns
8	tOHZ	Out Disable to Output in High Z	0	35	0	40	ns
9	tOH	Output Hold from Address Change	15		1 5		ns
WRITE CYCLE
1 0	twc	Write Cycle Time	100		120		ns
1 1	tCW	Chip Selection to End of Write	80		100		ns
12	tAW	Address Valid to End of Write	80		100		ns
1 3	tAS	Address Set-up Time	0		0		ns
14	tWP	Write Pulse Width	70		85		ns
1 5	tWR	Write Recovery Time	0		0		ns
16	tWHZ	Write to Output in High Z	0	30	0	40	ns
1 7	tDW	Data to Write Time Overlap	40		50		ns
1 8	tDH	Data Hold from Write Time	0		0		ns
1 9	tOW	Output Active from End of Write	1 0		10		ns


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