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R 65NC22J2 Datasheet

PA8 PA7 PA6 PA5 PA4 PA3 PA2 PAl PAO	Block
OoOOOOxxx OOOOOIXXX OOO010XXX OOO011XXX 111100XXX 111101XXX 111110XXX 111111XXX	0 1 2 3 60 61 62 63

R 65NC22J2 Price

PRODUCT SUMMARY
V(BR)DSS (V)	rDS(on) (Q)	ID (A)
40	0.0035 @ VGS = 10 V	110 8

R 65NC22J2 on stock

Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition.

Fast access time: 8, 10, 12, 15ns CMOS low power operation: 150/125/110/90 mA at min. cycle time Single 3.3V + 0.3V power supply All inputs and outputs are TTL compatible Fully static operation Industrial Temperature Option: -400 t0 850C Package line up J: 400mil, 36 pin SOJ package TP: 400mil, 44 pin TSOP Type lI package

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