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R02520101 Datasheet While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. R02520101 Price
R02520101 on stock The clock synthesizer generates a serial output clock (TXSCLK) which is phase synchronised with the input reference clock (REFCLK). The serial output clock is synthesized from one of four SDH/SONETinput reference clock frequencies and can have a frequency of either 155.52 MHz for STMl/OC3 0r 622.08 MHz for STM4/OC12 selected by the MODE input (see Table l).
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