R110N331B Datasheet 0 8:2 S/PDIF Input MUX o ADC High-pass Filter for DC Offset Calibration o Expandable ADC Channels and One-Iine Mode Support o Digital Output Volume Control with Soft Ramp o Digital +/-15dB Input Gain Adjust for ADC o Differential Analog Architecture o Supports logic levels between 5 V and l.8 V. R110N331B Price| TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) | | | | | | | | LIN | TS | | | | PARAMETER | SYMBOL | CONDITIONS | NOTES | TEMPERATURE | MIN | MAX | UNITS | | Input Capacitance | CIN | Any Input | 1.2 | +250C | | 7.5 | pF | | NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POSTIRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS | | | | | | | | LIN | TS | | | | PARAMETER | SYMBOL | CONDITIONS | NOTES | TEMPERATURE | MIN | MAX | UNITS | | Supply Current | IDD | VDD = 20V, VIN = VDD or GND | 1.4 | +250C | | 2.5 | | | N Threshold Voltage | VNTH | VDD = 10V, ISS = -10ccA | 1.4 | +250C | -2.8 | -0.2 | V | | N Threshold Voltage Delta | CVNTH | VDD = 10V, ISS = -10ccA | 1.4 | +250C | | +1 | V | | P Threshold Voltage | VPTH | VSS = OV, IDD = 100:A | 1.4 | +250C | 0.2 | 2.8 | V | | P Threshold Voltage Delta | ~/PTH | VSS = OV, IDD = 100:A | 1.4 | +250C | | +1 | V | | Functional | F | VDD = 18V, VIN = VDD or GND | 1 | +250C | VOH> | VOL< | V | | VDD = 3V, VIN = VDD or GND | | VDD/2 | VDD/2 | | Propagation Delay Time | TPHL TPLH | VDD= 5V | 1,2,3,4 | +250C | | 1.35 x +2 50C Limit | ns | | NOTES: 1. All voltages referenced to device GND. 3. See Table 2 for +250C limit. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25aC | | | PARAMETER | SYMBOL | DELTA LIMIT | | | Supply Current - SSI | IDD | +0.1oA | | Output Current (Sink) | IOL5 | +20% x Pre-Test Reading | | Output Current (Source) | IOH5A | +20% x Pre-Test Reading | | TABLE 6. APPLICABLE SUBGROUPS | | | CONFORMANCE GROUP | MIL-STD-883 METHOD | GROUP A SUBGROUPS | READ AND RECORD | | | Initial Test (Pre Burn-In) | 100% 5004 | 1,7,9 | IDD, IOL5 | | Interim Test l (Post Burn-In) | 100% 5004 | 1 7.9 | IDD, IOL5 | | Interim Test 2 (Post Burn-In) | 100% 5004 | 1 7.9 | IDD, IOL5 | | PDA (Note 11 | 100% 5004 | 1, 7, 9, Deltas | | | Interim Test 3 (Post Burn-In) | 100% 5004 | 1 7.9 | IDD, IOL5, IOH5A | | PDA (Note 11 | 100% 5004 | 1, 7, 9, Deltas | | | Final Test | 100% 5004 | 2, 3, 8A, 8B, 10, 11 | | | GroupA | Sample 5005 | 1, 2, 3, 7, 8A, 8B, 9, 10, 11 | | | Group B | Subgroup B-5 | Sample 5005 | 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas | Subgroups l, 2, 3, 9, 10, 11 | | Subgroup B-6 | Sample 5005 | 1 7.9 | | | Group D | Sample 5005 | 1, 2, 3, 8A, 8B, 9 | Subgroups l, 2 3 | | NOTE: 1. 5% Parameteric, 3% Func' | onal; Cumulative fo | . Static l and 2. | | | | | | | | | | | | | | | | |
R110N331B on stock o o o o o o o o L r , o L O O L n o o o r _ r _ < D C O L n L n ( O l I L W ) 3 0 N V l O f l O N O O S N V H I H 3 1 d l l d W V H O H H 3 rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the lC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than
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