The circuit delivers current pulses to the triac at zero crossings of the main line sensed by Pin 8 through Rsync. An internal full wave logic allows the triac to latch during full wave periods in order to avoid any dc component in the main line, in compliance with European regulations. Trigger pulses are generated when the comparator detects VPin 3 is above VPin 4 (or Vreference) as sensed temperature through the NTC is then lower than the set value (Vref corresponding to the external Wheatstone bridge equilibrium). In order to comply with norms limiting the frequency at which a kW sized load, or above, may be connected to the main line (fluorescent tubes "flickering"), the UAA1016B has
| Part Number | BVnss V | ID mA | IDM ^ | V Min | VGS(tm Max. | t ID mA | Q a Max. | RDSl m^ | VGS V | PD W |
| ZVNL535AM1 ZVNL120AM1 | 350 200 | 90 180 | O8 2 | 0.5 0.5 | 1.5 1.5 | 1 1 | 40 10 | 50 1 25 | 3 3 | 0.7 0.7 |
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