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R113.427.000 Datasheet

			ur f C
			' 1 11 I
			I l l
			Pllu T = 250C
			1 11 1

r			l=+7C _j4j r l l I
			Tj =125aC llll

R113.427.000 Price

Input offset voltage RG = so o	o	-17		1 7	-20	20	mV
Input offset current Input current	Ilo Il	-10	5	10 25	-20	20 35	nA nA
Open-Ioop voltage gain f=1 kHz	Gvo	70			70		dB

R113.427.000 on stock

CASE	TYPE NO.	Gfs (mmho) MIN	Goss (ymho) MAX	ciss (pF) MAX	Crss (pF) MAX	V(BR)GSS (v) MIN	VG<: MIN	(off) MAX	ID MIN	SS MAX	PIN OUT
T0-72 T0-72 T0-72 T0-18 T0-18 T0-18 T0-18 T0-92 T0-92 T0-92 T0-72 T0-72 T0-92 T0-92 T0-92 T0-92 T0-92 T0-92	2N4220 2N4221 2N4222 2N4338 2N4339 2N4340 2N4341 2N5457 2N5458 2N5459 2N5556 2N5557 PN3685 PN3686 PN3687 PN4302 PN4303 PN4304	1.0 2.0 2.5 0.6 0.8 1.3 2.0 1.0 1.5 2.0 1.5 1.0 0.5 1.0 2.0 1.0	10 20 40 5.0 15 30 60 50 50 50 25 10 5.0 50 50 50	6.0 6.0 6.0 7.0 7.0 7.0 7.0 7.0 7.0 7.0 6.0 6.0 4.0 4.0 4.0 6.0 6.0 6.0	2.0 2.0 2.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 1.2 1.2 1.2 3.0 3.0 3.0	30 30 30 50 50 50 50 25 25 25 30 30 50 50 50 30 30 30	0.3 0.6 1.0 2.0 0.5 1.0 2.0 0.2 0.8 1.0 0.6 0.3	4.0 6.0 8.0 1.0 1.8 3.0 6.0 6.0 7.0 8.0 4.0 5.0 3.5 2.0 1.2 4.0 6.0 10	0.5 2.0 5.0 0.2 0.5 1.2 3.0 1.0 2.0 4.0 0.5 2.0 1.0 0.4 0.1 0.5 4.0 0.5	3.0 6.0 15.0 0.6 1.5 3.6 9.0 5.0 9.0 16 2.5 5.0 3.0 1.2 0.5 5.0 10 5.0	SDGC SDGC SDGC SDG SDG SDG SDG DSG DSG DSG SDGC SDGC DSG DSG DSG DSG DSG DSG

An external 47-pF ceramic capacitor is required across the output (Vo and GND) for proper operation. Locate the capacitor close to the module. Adding another 47 pF of electrolytic capacitance close to the load improves the response of the regulator to load transients. This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application information for further guidance. This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 7 ml as the minimum when calculating the total equivalent series resistance (ESR) using the max-ESR values specified by the capacitor manufacturer.

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