RS8251ETFC-28251-16P Datasheet| | | LH ITS | | | SYMBOL | PARAMETER | MIN | MAX | UNT | | vcc | DC supply voltage | 2.7 | 3.6 | V | | vI | Input voKage | O | 5.5 | V | | VIH | High-levelinput vokage | 2.0 | | V | | VIL | Low-Ievel Input voltage | | 0.8 | V | | IOH | High-Iewl OUtp cLnent | | -20 | mA | | IOL | Low-level output current | | 32 | mA | | At/Av | Input transition rise or fall rate; Outputs enabled | | 10 | nsN | | Tamb | Operating free-air temperature range | -40 | +85 | oC | | | | | |
RS8251ETFC-28251-16P Price| | | | | | J ' | VGS= OV | | Tc= | 125' | C: | | 7 | Ul l | ,e l | esi | | | | | | | h | l '750C | | | | | | | | | | 2 1 | ioc | | | | | | | r | J | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | }l | | | | | | | | | |j | j | 7 | | | | | | | | | j | | | | | | | | | | | | | | | | | | |
RS8251ETFC-28251-16P on stock Figure l. Single-Speed Mode Stopband Rejection. . . . Figure 2. Single-Speed Mode Transition Band . . . . . . . Figure 3. Single-Speed Mode Transition Band (Detail). Figure 4. Single-Speed Mode Passband Ripple . . . . . . Figure 5. Double-Speed Mode Stopband Rejection . . . Figure 6. Double-Speed Mode Transition Band . . . . . . Figure 7. Double-Speed Mode Transition Band (Detail) Figure 8. Double-Speed Mode Passband Ripple . ' ' ' ' Figure 9. Quad-Speed Mode Stopband Rejection . ' ' ' Figure 10. Quad-Speed Mode Transition Band . . . . . . Figure 11. Quad-Speed Mode Transition Band (Detail) Figure 12. Quad-Speed Mode Passband Ripple . ' ' ' ' Figure 13. Master Mode, Left-Justified SAl. . . . . . . . . . Figure 14. Slave Mode, Left-Justified SAl. . . . . . . . . . . Figure 15. Master Mode, 12S SAl. . . Figure 16. Slave Mode, 12S SAl. . . . Figure 17. OVFL Output Timing . . . Figure 18. Left-Justified Serial Audio Interface . . . . . . . Figure 1 9. 12S Serial Audio Interface . . . . . . Figure 20. OVFL Output Timing, 12S Format. . . . . . . . . Figure 21. OVFL Output Timing, Left-Justified Format. Figure 22. Typical Connection Diagram . ' ' Figure 23. CS5381 Master Mode Clocking . . . . . . . . . . Figure 24. Recommended Analog Input Buffer. . . . . . . Figure 25. CS5381 THD + N versus Frequency . . . . . . | Drain- source breakdown voltage VGS = 0 V, /D = -0.25 mA, Tj = 25 0C | V(BR)DSS | -100 | | | V | | Gate threshold voltage VGS= VDS, /D = 1 mA | VGS(th) | -2.1 | -3 | -4 | | Zero gate voltage drain current VDS = -100 V, VGS = 0 V, Tj = 25 aC VDS = -100 V, VGS = 0 V, Tj = 125 aC | /DSS | | -0.1 -10 | -1 -100 | UA | | Gate-source leakage current VGS = -20 V, VDS = OV | /GSS | | -10 | -100 | nA | | Drain-Source on-resistance VGS = -10 V, /D = -9.5 A | RDS(on) | | 0.2 | 0.3 | 1 | | | | | | |
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