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RSA61E Datasheet

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V CE -2V
Ta =75
250C L
- 250C
Collector Current,Ic - A


RSA61E Price

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RSA61E on stock
The 6-bit mode registers contain the configuration for each of the four DMA channels. When writing from dbin [ 7 . . O ] , the first two bits of the mode register format selects the DMA channel mode register. Before reading each of the mode registers, the clear mode register counter command must be executed. The next read from the mode register address returns the value from the channel o mode register. Subsequent mode register reads step through the other mode registers in order. See Table 4.
This gives the Serial DataFlash the ability to virtually accommodate a continuous data stream. While data is being programmed into main memory from buffer l, data can be loaded into buffer 2 (or vice versa). See application note AN-4 ("Using Atmel's Serial DataFlash") for more details.