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conversion process. The MODE input is used to select the conversion mode of the device. With the MODE input LOW (or open) the device will function as a 4-bit converter. When the mode input is driven HIGH, the internal load clock will change on every eighth clock cycle, thus allowing for an 8-bit conversion scheme using two E446s. When cascaded in an 8-bit conversion scheme, the devices will not operate at the l.3Gb/s data rate of a single device. Refer to the applications section of this data sheet for more information on cascading the E446. For lower data rate applications, a VBB reference voltage is supplied for single-ended inputs. When operating at clock rates above 500MHz, differential input signals are recommended. For single-ended inputs, the VBB pin is tied to the inverting differential input and bypassed via a O.OlccF capacitor. The VBB provides the switching reference for the input differential amplifier. The VBB can also be used to AC couple an input signal.
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