RSHLQ-012-A Datasheet| Parameter | Min | Typ | Max | Unit | | | Luminous (2856 K) | 80 | 1 50 | | htA/lm | | Cathode Sensitivity | Radiant at 420 nm | | 64 | | mA/W | | Red/White Ratio (R-68) | | 0.2 | | | | | Luminous (2856 K) | 20 | 80 | | A/lm | | Anode Sensitivity | Radiant at 420 nm | | 3.4×104 | | A/W | | Gain | | 5.3×105 | | | | Anode Dark Current (after 30 min storage in darkness) | | 5 | 20 | nA | | | Anode Pulse Rise Time | | 9.0 | | ns | | Time Response | Electron Transit Time | | 70 | | ns | | | | | | |
RSHLQ-012-A Price| | | | Limits | | | Symbol | Parameter | Test conditions | Min | Typ | Max | Unit | | V (BR) DSS | Drain-source breakdown voltage | ID = ImA, VGs = OV | 250 | | | v | | V (BR) GSS | Gate-source breakdown voltage | IG = +100ccA, VDS = OV | ±30 | | | v | | IGSS | Gate-source leakage current | VGS = +25V, VDS = OV | | | ±10 | | | IDSS | Drain-source leakage current | VDS = 250V, VGS = OV | | | 1 | mA | | VGS (th) | Gate-source threshold voltage | ID = 1rTiA, VDS = 10V | 2 | 3 | 4 | v | | rDS (ON) | Drain-source on-state resistance | ID = 3A, VGS = 10V | | 0 63 | 0.80 | | | VDS (ON) | Drain-source on-state voltage | ID = 3A, VGS = 10V | | 1 90 | 2 40 | v | | yfs | Forward transfer admittance | ID = 3A, VDS = 10V | 2 3 | 3 5 | | S | | Ciss | Input capacitance | | | 370 | | pF | | Coss | Output capacitance | VDS = 25V,VGS = Oy f= 1MHz | | 80 | | pF | | Crss | Reverse transfer capacitance | | 16 | | pF | | td (on) | Turn-on delay time | | | 15 | | ns | | tr | Rise time | VDD = 150V ID = 3A, VGS = 10V, RGEN = RGS = sol | | 22 | | ns | | td (off) | Turn-off delay time | | 50 | | ns | | tf | Fall time | | 26 | | ns | | VSD | Source-drain voltage | Is = 3A, VGS = OV | | 1 5 | 2 0 | v | | Rth (ch-c) | Thermal resistance | Channel to case | | | 1 67 | IC/W | | | | | | | |
RSHLQ-012-A on stock| Table 6: Revision | history | | | | | | Document ID | Release date | Data sheet status | Change notice | Doc. number | Supersedes | | 2N7002E 2 | 20050426 | Product data sheet | 9397 750 14944 | 2N7002E-01 | | | | | | |
| | | | | | | Enable parity checking on the Utopia interface. | | prty_en | ln | If disabled (tied t0 0), the wrx_err_stat(0) signal can be ignored and left open and the rx parity input should be tied t0 0. Also the tx parity pins can be left open. Define cellsize: sets the size in bytes of a cell. Binary value to be set usually by | | cellsize[7:0] | In | board wiring. The size must be a multiple of 4. | | | |
|
