| 1 | CVBS /Cb | 0 | Analog conWosite video signal output or Cb signal output current drive(positivel |
| 2 | CVBS /Cb | 0 | Analog composite video signal output or Cb signal output current drive(negative) |
| 3 | CVBS/CbVdd | | Power Supply for CVBS / Cb DAC circuit |
| 4 | Y | 0 | Analog luminance signal output current drive(positive) |
| 5 | | 0 | Analog luminance signal output current drive(negative) |
| 6 | YVdd | | Power Supply for Y DAC circuit |
| 7 | C/Cr | 0 | Analog chrominance signal output or Cr signal output current drive(positive) |
| 8 | C/Cr | 0 | Analog chrominance signal output or Cr signal output current drive(negative) |
| 9 | C/CrVdd | | Power Supply for C / Cr DAC circuit |
| 10 | DAVss | | Ground for DAC circuit |
| 1 1 | Ibias | 0 | Reference current for the 3 DACs |
| 12 | DAVdd | | Power Supply for DAC circuit |
| 13 | VReff | | Reference full scale voltage for the 3 DACs |
| 14 | ChipA | | 12C chip address select { O : 42(hex)/43(hex) 1 : lC(hex )/lD(hex) } |
| 15 | TEST | I | TEST pin(Ground) |
| 16 | SO | z(0) | If SPI mode, serial data output /IfI2C mode, connect to Ground |
| 17 | SDA/SI | I/O (I) | Serial data input, Open drain output /If SPI mode, serial data input |
| 18 | SCL/SCK | I | Serial clock |
| 19 | SEL | (I) | Connect to Ground / If SPI mode, this pin is chip select |
| 20 | DVss | | Ground for Digital circuit |
| 21 | CLOCK | I | 27MHz clock input |
| 22 | DVdd | | Power Supply for Digital circuit |
| 23 | Reset | I | Reset signal, active LOW |
| 24 | PAL/NTSC | I | NTSC/PAL select . This pin active only Reset time. (NTSC : Low PAL : High ) |
| 2532 | DVIA7~0 | I | 8-bit Multiplexed Y/Cr/Cb 4:2:2 data(ITU Rec656) input(DVIAl or Multiplexed Y data |
| | | | (ITU- Rec656/601) input in 16-bit input mode (DVIA7 : MSB ) |
| 33 | Vmute | I | Video mute on Reset ( 0 : nomal, 1 : mute ), or TEST data input |
| 34 | C/FsyncN BI | I/O | Csync/Frame sync output or external VBI information input |
| 35 | F/Vsync | I/O | Frame sync or Vertical sync input/output |
| 36 | Hsync | I/O | Horizontal sync input/output |
| 37 | A/B sel | I/O | Switch control for 8-bit X 2 Multiplexed Y/Cr/Cb 4:2:2 data(ITU- Rec656) input |
| | | | (DVIA) or (DVIB) , or test data I/O |
| 3841 | DVIB8~5 | I/O | 8-bit Multiplexed 4:2:2 data(ITU- Rec656/601) input(2), or Multiplexed Cr/Cb data |
| | | | (ITU- Rec656/601) input in 16-bit input mode (MSB: DVIB8), or Test data input/output |
| 42 | DVss | | Ground for Digital circuit |
| 43 | DVdd | | Power Supply for Digital circuit |
| 4447 | DVIB4~1 | I/O | 8-bit Multiplexed 4:2:2 data(ITU- Rec656/601) input(DVIB), or Multiplexed Cr/Cb |
| | | | data(ITU- Rec656/601) input in 16-bit input mode (LSB:DVIBl), or Test data l/0 |
| 48 | TP | I/O | for test (should be ground) |
| | | |