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RT629-66P Datasheet



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Parameter	Symbol	Applicable terminal	Min	Typ.	Max	Unit
Shift frequency	fCL	CL2			1	MHz
High level lock width	tCWH	CLl, CL2	470			ns
Low level lock width	tCWL	CL2	470			ns
Data setup time	tsu	Dl	120			ns
Clock setup time 1	tSL	CL2	220			ns
Clock setup time 2	tLS	CL1	220			ns
Data hold time	tOH	DI	120			ns
Clock rise / fall time	tct	CLl, CL2			50	ns
FLM setup time	tFDS	FLM	120			ns
FLM hold time	tFDH	FLM	120			ns
Output delay time	tpd	DO			250	ns
AC conversion signal	fM	M		70		Hz

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A proper BBM time is essential in order to prevent shoot-through current and maintain high efficiency. The break-before-make time is set internally at 20 ns @ Vs = 3.6 V. The high and low-side MOSFET drain voltages are monitored and when the drain voltage reaches the l.75 V below or above its initial starting voltage, 20 ns BBM time is set before the other switch turns on. The maximum controllable duty cycle is limited by the BBM time. Since the BBM time is fixed, maximum controllable duty cycle will vary depending on the switching frequency.

Collector-Base Breakdown Voltage lc = 1 LrA	V(BR)CBO	30		V
Collector-Emitter Breakdown Voltage lc = 3 mA	V(BR)CEO	15		V
Emitter-Base Breakdown Voltage IE =10 pA	V(BR)EBO	3.0		V
Collector-Emitter Cutoff Current VCB =15V	ICES		100	nA
Collector-Base Cutoff Current VCB =15V	ICBO		10	nA

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