| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
RT916733CB Datasheet
RT916733CB Price These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited RT916733CB on stock The X28HC256 supports a 128-byte page write opera- tion, effectively providing a 24ps/byte write cycle, and enabling the entire memory to be typically rewritten in less than 0.8 seconds. The X28HC256 also features DATA Polling and Toggle Bit Polling, two methods of providing early end of write detection. The X28HC256 also supports the JEDEC standard Software Data Pro- tection feature for protecting against inadvertent writes during power-up and power-down. Manua I-Reset Input Many pP-based products require manual-reset capabil- ity, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts reset. Reset remains asserted while MR is low, and for the reset active timeout period after MR returns high. |
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