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SKKH330-18E Datasheet

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SKKH330-18E Price
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
SKKH330-18E on stock
PRESTO lIl Programming Algorithm The PRESTO lIl Programming Algorithm allows the whole array to be programed with a guaran- teed margin in a typical time of 26 seconds. Pro- gramming with PRESTO lIl consists of applying a sequence of 50ps program pulses to each word until a correct verify occurs (see Figure 9). During programing and verify operation a MARGIN MODE circuit is automatically activated to guaran- tee that each cell is programed with enough mar- gin. No overprogram pulse is applied since the verify in MARGIN MODE at Vcc much higher than 3.6V provides the necessary margin to each pro- grammed cell.

Characteristics Symbol Test Conditions Min TVP Max Units
IGBT Inverter Sector
Collector Cutoff Current ICES VCE = VCES, VGE = OV 1 mA