SKKT210-14E Datasheet| S08 | Minidip | | UC2842ADl; UC3842AD1 UC2843ADl; UC3843AD1 UC2844ADl; UC3844AD1 UC2845ADl; UC3845AD1 | UC2842AN; UC3842AN UC2843AN; UC3843AN UC2844AN; UC3844AN UC2845AN; UC3845AN | | |
SKKT210-14E Price| Sym | Parameter | Test Condition | Part No. | Pin | Min | Typ | Max | Unit | | N | Input Frequency | crystal | | ICLK | 5 | | 30 | MHz | | | | Vcc: 3.0 t0 5.5V | 4501 | CLK | 20 | | 180 | | | four | Output frequency | Vcc: 3.0 t0 5.5V | 4501A | CLK | 20 | | 150 | MHz | | tr | Output clock rise time | 0.8 t0 2.OV | | CLK | | 1 | | ns | | tf | Output clock fall time | 2.0 t0 0.8V | | CLK | | 1 | | ns | | | | At | Vcc: 3V, up t0 120MHz | | | | | | % | | Duty | Output clock duty cycle | CC 2 | VCc: SV, up t0 150MHz | CLK | 45 | 50 | 55 | | | PLL bandwidth* | | | | 10 | | | kHz | | | Output enable time | OE high to output on | | | | 15 | 50 | ns | | | Output disable time | OE low to tri-state | | | | 15 | 50 | ns | | | Period Jitter | 70MHz~200MHz, 25C | | CLK | | 50 | 100 | ps | | | Jitter over 200ns interval | 100MH~200MHz, 25C | | CLK | | | 200 | ps | | | | | | | | | | |
SKKT210-14E on stock t contains information for a new product. Crystal Preliminary Product Information ~~'r~i2~:::cet2trco r reserves the right to modify this product without notice | Drain- source breakdown voltage VGS = 0 V, /D = 0.25 mA, Tj = 25 aC | V(BR)DSS | 1 000 | | | V | | Gate threshold voltage VGS= VDS, /D = 1 mA | VGS(th) | 2.1 | 3 | 4 | | Zero gate voltage drain current VDS = 1000 V, VGS = 0 V, Tj = 25 aC VDS = 1000 V, VGS = 0 V, Tj = 125 aC | /DSS | | 0.1 1 0 | 1 1 00 | UA | | Gate-source leakage current VGS = 20 V, VDS = OV | /GSS | | 1 0 | 1 00 | nA | | Drain-Source on-resistance VGS = 10 V, /D = 4A | RDS(on) | | 1.3 | 1.5 | 1 | | | | | | |
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