Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transi- tions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts. Also, write operations to the device can be disabled via the write protect pin (WP).
SL1005S1160111 on stock| PARAMETER | SYMBOL | MIN | TYP. | MAX | UNIT |
| Address setup time | tAS | 2 | | | |
| Chip enable setup time | tCES | 2 | | | |
| Output enable setup time | tOES | 2 | | | Lrs |
| Data setup time | tDS | 2 | | | |
| Address hold time | tAH | 0 | | | |
| Data hold time | tDH | 2 | | | LLS |
| Chip enable to output float delay | tDF | 0 | | 150 | ns |
| Data valid from output enable | tOE | | | 150 | ns |
| VPP setup time | tVPS | 2 | | | |
| Vcc setup time | tvcs | 2 | | | |
| P pulse width | tPW | 0.95 | 1.0 | 1.05 | ms |
| Add P~M pulse width | tOPW | 2.85 | | 78.75 | ms |
| Program pulse count | N | 1 | | 25 | TIMES |
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| - 0.5 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| - 0.2 | | | | | | | | | | | = | i_ | | | | | | | | | | | | | | | | | |
| | | | | | | | | iii | | | | | | | | | | | | | | | | | | | | |
| _ 0.1 - 0.05 | | | | | | | | | | | | | | | | | | | | __ |
| - 0.02 ; 0.01 I SINl | }UL: | | - -- | | | | l | DTES: | | | | | | | | | | | PDM l l 'F ;l t, t21= | _ l | - |
| I | II | | | | | | PEAK Tj = PDM x ZOJC +TC | UTY | kCTI | JR | )= | tl/t | 2 | | | | | | | L l l l | 3LE l |
| | | | IIIIIIIIIIII | | | | | | I I IIIII I I I I III | 10-5 |
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