| IIII I-l-J. IIII' | | l | | | | |
| Vcc 200V | | o | | | | |
| lc:IBl | IB2: 1 | 1 0 | 1-2 | | to. | | | | | |
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1. Set logic gate and switch Vdd = +3V to +10V and use HCT series logic to provide a TTL driver interface. 2. Control inputs NB can be driven directly with CMOS logic (HC) with Vdd of +3 to +10 Volts applied to the CMOS logic gates and to pin 4 0f the RF switch. 3. DC Blocking capacitors are required for each RF port as shown. Capacitor value determines lowest frequency of operation. 4. Highest RF signal power capability is achieved with V set to +10V. The switch will operate properly (but at lower RF power capability) at bias voltages down to +3V.