All of these current sources are switched to one or the other of the two output nodes (i.e., IOUTA or IOUTB) via PMOS differential current switches. The switches are based on a new architecture that drastically improves distortion performance. This new switch architecture reduces various timing errors and provides matching complementary drive signals to the inputs of the differential current switches.
| Characteristics | Symbol | Test Condition | Min | Typ. | Max | Unit |
| Pulse drain reverse current (Note l) | IDRP | | | | 10 | A |
| Forward voltage (diode) | VDSF | IDR = 2.5 A, VGS = 0 V | | | 1 2 | V |
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