SVP27852 Datasheet| Characteristic | Symbol | Test Conditions | Min | Typ | Max | Unit | | | | Tj=+250C | - 8.7 | - 9.0 | - 9.3 | V | | Output Voltage | Vo | 10 = 5mA t0 1A, P0 15W VI = -1.5 to -23V | - 8.6 | - 9.0 | - 9.4 | | | | - - IV, = -10.5 to -25V | | 10 | 180 | | | Line Regulation | AVo | 'J - uIVi= -ii to -17V | | 5 | 90 | mV | | | | Tj =+ 250C 10 = 5mA t0 1.5A | | 12 | 180 | | | Load Regulation | AVo | Tj =+ 250C 10 = 250 t0 750mA | | 4 | 90 | mV | | Cluiescent Current | lo | Tj=+250C | | 3 | 6 | mA | | | | lo= 5mA t0 1A | | 0 05 | 0 5 | | | Quiescent Current Change | Alo | VI = -11.5 to -25V | | 0 1 | 1 | mA | | Temperature Coefficient of VD | AVo/AT | 10= 5mA | | -0.6 | | mV/oC | | Output Noise Voltage | VN | f = 10Hz t0 100KHz TA =+ 25QC | | 175 | | LiV | | Ripple Rejection | RR | f= 120Hz AVi = 10V | 54 | 60 | | dB | | Dropout Voltage | VD | Tj=+ 250C lo = 1A | | 2 | | V | | Short Circuit Current | lsc | Tj= +25QC, Vi = -35V | | 300 | | mA | | Peak Current | IPK | Tj =+250C | | 2 2 | | A | | | | | | | |
SVP27852 Price| TEST | SWITCH | | tPLH, tPHL | Open | | tPZL, tPLZ (VCC = 3.0 t0 3.6V) | 6V | | tPZL, tPLZ (VCC = 2.3 t0 2.7V or l.8V) | 2Vcc | | tPZH, tPHZ | GND | | |
SVP27852 on stock| | Parameter | Typ. | Max | Units | | RejC | Thermal Resistance, Junction-to-Case - IGBT | | 0 20 | | | RejC | Thermal Resistance, Junction-to-Case - Diode | | 0.35 | oC/W | | Recs | Thermal Resistance, Case-to-Sink - Module | 0 1 | | | | Mounting Torque, Case-to-Heatsink | | 4 0 | Nm | | | Mounting Torque, Case-to-Terminal l, 2 & 3 | | 3 0 | | | Weight of Module | 200 | | g | | | | | |
| | | Version | | | | Parameter | Symbol | -7C | -75 | -1H | -1L | Unit | Note | | Row active to row active delay | tRRD(rriiri) | 15 | 15 | 20 | 20 | ns | 1 | | RAS to CAS delay | tRCD(rriiri) | 15 | 20 | 20 | 20 | ns | 1 | | Row precharge time | tRP(rriill) | 15 | 20 | 20 | 20 | ns | 1 | | Row active time | tRAS(mill) | 45 | 45 | 50 | 50 | ns | 1 | | tRAs(max) | 100 | us | | | Row cycle time | tRc(Friin) | 60 | 65 | 70 | 70 | ns | 1 | | Last data in to row precharge | tRDL(miri) | 2 | CLK | 2.5 | | Last data in to Active delay | tDAL(rriirl) | 2 CLK +tRP | | 5 | | Last data in to new col. address delay | tCDL(rriiri) | 1 | CLK | 2 | | Last data in to burst stop | tBDL(rriiri) | 1 | CLK | 2 | | Col. address to col. address delay | tCCD(rriirl) | 1 | CLK | 3 | | Number of valid output data | CAS latency=3 | 2 | ea | 4 | | CAS latency=2 | 1 | | | | | | | | | |
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