| | | Commercial/lndustrial | Military | |
| Symbol | Description | Min | Max | Min | Max | Units |
| TCDF(3) | CLK to Data Float Delay | | 50 | | 50 | ns |
| TOCK(2) | CLK to ~EO Delay | | 50 | | 55 | ns |
| TOCE(2) | CE to ~EO Delay | | 35 | | 40 | ns |
| TOOE(2) | RESET/OE to ~EO Delay | | 35 | | 35 | ns |
| | | | | | |
V- (Pins 8, 9): The V- negative supply voltage pins should be tied togetherand bypassed to GND by a O.laF capacitor in a dual-supply system. In a single-supply system, tie these pins to the ground plane. EN (Pin 10): ENABLE. When the EN input goes high or is open circuited,the LT1568 enters a shutdown state which reduces the supply current to_approximately 0.5mA (VS = 5V). The OUTA, OUTB, OUTA and OUTB pins assume high impedance states. GNDA will continue to be biased at half-supply. If an input signal is applied to a complete filter circuit while the LT1568 is in shutdown, some signal will normally flow to the output through passive components around the inactive IC.
