| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
SWSC0301-3R3YF Datasheet
SWSC0301-3R3YF Price FEATURES co Up t0 3-A Output Current at 85IC .. 3.3-V / 5-V Input Voltage .. Wide-Output Voltage Adjust (0.9 V t0 3.6 V) .. 160 W/in3 Power Density Efficiencies Up T0 94% co On/Off In hibit .. Undervoltage Lockout (UVLO) .. Output Overcurrent Protection (Nonlatching, Auto-Reset) .. Overtemperature Protection SWSC0301-3R3YF on stock The AD/DA converter is a 12-bit successive companson type. The sampling frequency when the system clock operates at 4 MHz is 32 kHz. The analog signal input from the AD converter is converted t0 12-bit digital data. The digital delay circuit compresses the 12-bit signal t0 4-bit, writes it to delay RAM, then reads it. The 4-bit data read from delay RAM is de-compressed t0 12-bit. The 12-bit data are converted to analog signals by the DA converter and output. The area for delay RAM memory is 4096 words X 4 bits. The echo delay time is 4096 words X (1/32 kHz) = 128 ms. Figure 3 is a block diagram of the echo circuit. |
