| | | | Limits |
| Characteristics | Symbol | Test Conditions | Min. Typ. Max. | Units |
| Control Logic |
| Buffer Input Offset Volt. | Vl0 | | 0 ±1 5 | mV |
| Reference Divider Ratio | | D14=High | 9.9 1 0 1 0.2 | |
| D14=Low | 4.95 5.0 5.05 | |
| Propagation Delay Times | tpd | PWM change to source ON PWM change to source OFF PWM change to sink ON PWM change to sink OFF Phase change to sink ON Phase change to sink OFF Phase change to source ON Phase change to source OFF | 600 1 00 600 1 00 600 1 00 600 1 00 | ns ns ns ns ns ns ns ns |
| Thermal Shutdown Temp. | Tj | | 1 65 | aC |
| Thermal Shutdown Hysteresis | ATj | | 1 5 | oC |
| UVLO Enable Threshold | UVLO | Increasing VDD | 3.90 4.2 4.45 | v |
| UVLO Hysteresis | UVLO | | 0.05 0.10 | v |
| Logic Supply Current | IDD | fPWM<50 kHz | 6.0 1 0 | mA |
| Sleep Mode, Inputs < 0.5 V | 2.0 | mA |
| | | | |
