SY100EL56VZI-TR Datasheet| | | | Limits | | | Symbol | Parameter | Test Condition | Min. | Typ. | Max | Unit | | Rth(j-c)0 | | Inverter IGBT part (per l element), (Note-l) | | | 0.16 | | | Rth(j-c)F | Inverter FWDi part (per l element), (Note-l) | | | 0 24 | | Rth(j-c)0 | Brake IGBT part (Note-l) | | | 0.30 | | Rth(j-c)F | Junction to case Thermal | Brake FWDi part (Note-l) | | | 0 80 | | Rth(j-c')Q | Resistances | Inverter IGBT part (per l element), (Note-2) | | | 0.10 | oC/w | | Rth(j-d)F | Inverter FWDi part (per l element), (Note-2) | | | 0 16 | | Rth(j-c')Q | Brake IGBT part (Note-2) | | | 0122 | | RthO-d)F | Brake FWDi part (Note-2) | | | 0.36 | | Rth(c-f) | Contact Thermal Resistance | Case to fin, Thermal grease applied (per l module) | | | 0.018 | | | | | | | |
SY100EL56VZI-TR Price *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SY100EL56VZI-TR on stock| SPECIFICATIONS (Tj = 250C UNLESS OTHERWISE NOTED) | | Parameter | Symbol | Test Condition | Min | Typa | Max | Unit | | Static | | Drain-Source Breakdown Voltage | V(BR)DSS | VGS = 0 V, ID = 250 yA | 60 | | | V | | Gate Threshold Voltage | VGS(th) | VDS = VGS, ID = 250 yA | 1 0 | 2 0 | 3 0 | | Gate-Body Leakage | IGSS | VDS = 0 V, VGS =20 V | | | 100 | nA | | | | VDS = 48 V, VGS = 0 V | | | 1 | | | Zero Gate Voltage Drain Current | IDSS | VDS = 48 V, VGS = 0 V, Tj = 1250C | | | 50 | VA | | VDS = 48 V, VGS = 0 V, Tj = 1750C | | | 250 | | On-State Drain Currentb | ID(on) | VDS = 5 V, VGS = 10V | 50 | | | A | | | | VGS = 10 V, ID = 20A | | 0 0074 | 0.0093 | Q | | VGS = 10 V, ID = 20 A, Tj = 1250C | | | 0.016 | | l Drain-Sour.e On-State Resistanceb | rDS(on) | VGS = 10 V, ID = 20 A, Tj = 1750C | | | 0.020 | | I | VGS = 4.5 V, ID = 15A | | | 0.0122 | | Forward Transconductanceb | 9fs | VDS = 15 V, ID = 20A | | | | s | | Dynamic | | Input Capacitance | ciss | | | 2650 | | pF | | Output Capacitance | coss | VGS = 0 V, VDS = 25 V, f = 1 MHz | | 470 | | | Reverse Transfer Capacitance | Crss | | 225 | | | Total Gate Chargec | Qg | | | 47 | 70 | | | Gate-Source Chargec | Qgs | VDS = 30 V, VGS = 10 V, ID = 50A | | 10 | | nC | | Gate-Drain Chargec | Qgd | | 12 | | | Turn-On Delay Timec | td(on) | | | 10 | 20 | | | Rise Timec | tr | VDD = 30 V, RL = 0.6 Q | | 15 | 25 | | Turn-Off Delay Timec | td(off) | ID 50 A, VGEN = 10 V, RG = 2.5 Q | | 35 | 50 | ns | | Fall Timec | tf | | 20 | 30 | | Source-Drain Diode Ratings and Characteristics (Tc = 250C) | | Pulsed Current | ISM | | | | 100 | A | | Diode Forward Voltage | VSD | IF = 20 A, VGS = OV | | 1 0 | 1.5 | V | | Reverse Recovery Time | trr | IF = 20 A, di/dt = 100 A/ys | | 45 | 100 | ns | | | | | | | |
The OM5234 contains a non-volatile 16k x 8 read-only program memory, a volatile 256 x 8 read/write data memory four 8-bit l/0 ports, tw0 16-bit timer/event counters (identical to the timers of the 80C51), a multi-source, two-priority-level, nested interrupt structure UART and on-chip oscillator and timing circuits.
|
