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SY7C63231 Datasheet

LC361000AMLL. ATLL. ARLL
Parameler Symbol ·70X ·10X Unit
min max mi¨n max
Write cycle time twc 70 100 S
Address valid to end of write tAW 60 70 ns
Address selup time tAS O 0 ns
Write pulse width tWP 50 70 ns
CEl setup time 'CW1 60 70 ns
CE2 setup time 'CW2 60 70 1S
Wrile recovery time 1WR 5 5 ns
eE l wme recovery Ume 'W1 0 0 ns
CE2 write recoVry time WR2 O O ns
Data setup time tDS 30 40 ns
Data hold time tDH 0 0 S
eEl dala hold rime tDH1 0 O ns
CE2 data hold time 'DH2 0 0 ns
WE output enablfa time 'woE 10 10 ns
WE output disable tIme 'WOD 25 30 ns


SY7C63231 Price

Parameter SD500N/R U nits Conditions
IF(AV) Max. average forward current 475 A 1800 conduction, half sine wave
@ Case temperature 55 oc
IF(AV) Max. average forward current 300 A 1800 conduction, half sine wave
@ Case temperature 100 oc
lr_..o, Max. RMS forward current F(RMS) 745 A DC @ 400C case temperature
IFSM Max. peak, one-cycle forward, 7500 A t= 10ms No voltage
non-repetitive surge current 7850 t= 8.3ms reapplied
6310 t= 10ms 50% VRRM
6600 t= 8.3ms reapplied Sinusoidal half wave,
12t Maximum l2t for fusing 281 t= 10ms No voltage Initial Tj = Tj max.
257 t= 8.3ms reapplied
199 KA2S t= 10ms 50% VRRM
182 t= 8.3ms reapplied
12 d Maximum I2St for fusing 2810 KA2 gs t = 0.1 t0 10ms, no voltage reapplied
VF(TO), Low level value of threshold voltage 0 88 V (16.7% x * x IF(AV) < I < * X IF(AV' Tj = Tj max.
VF(T0)2 High level value of threshold voltage 0 97 (l > * X IF(AV'TJ = Tj max.
rfi Low level value of forward slope resistance 0 78 m J (16.7% x * x IF(AV, < I < * X IF(AV' Tj = Tj max.
rf2 High level value of forward slope resistance 0 72 (l > # X IF(AV'TJ = Tj max.
VFM Max. forward voltage drop 1 66 V Ink= 1000A, Tj = Tj max, tn = 10ms sinusoidal wave


SY7C63231 on stock

Parameter Symbol Condition Min Max Unit
RD high-level width WRH 200 ns
RD low-level width WRL 200 ns
WR high-level width WWH 200 ns
WR low-level width LWWL 200 ns
WR-RD high-level width WWRH 200 ns
CS or C/D setup time tAS 50 ns
CS or C/D hold time tAH 0 ns
Write data setup time DSW 50 ns
Write data hold time DHW 50 ns
Read data output delay time tDDR CL=50 pF 200 ns
Read data hold time tDHR 20 ns
External clock high-level width WCH 1 s
External clock low-level width tWCL 1 s
RESET pulse width WRE 2.0 s
Rise and fall time of external clock trtf 100 ns


Note (1) : CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation : ICC (opr) = CPD-VCC-fIN +ICC