| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
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TPS3828-30DBVT Price Normally, the circuit starts oscillating as soon as pin VDD or HV reaches the level of release power drive. At this moment the gate drive voltage is equal to the voltage on pin VDD for the low side transistors and VDD - 0.6 V for the high side transistors. If this voltage is too low for sufficient drive of the MOSFETs the release of the power drive can be delayed via pin SU. A simple RC filter (R between pins VDD and SU; C between pins SU and SGND) can be used to make a delay, or a control signal from a processor can be used. TPS3828-30DBVT on stock
SFTR2:0 (BFP Mode Only) Accumulator result shift control. These pins should be linked directly to the S2:0 pins on the PDSP16318 Complex Accumulator. They control the accumulator's barrel shifter (see Table 5). The purpose of this shift is to minimise sig n extension in the multiplier or accu m ulator ALUs. In normal mode, SFTR2:0 are not used and should be |
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