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description	EVALUATION MODULE FOR TPS40200
Technical/Catalog Information	TPS40200EVM-001
Vendor	Texas Instruments
Category	Programmers, Development Systems
RoHS Status	RoHS Non-Compliant
Other Names	TPS40200EVM 001 TPS40200EVM001 296 19607 ND 29619607ND 296-19607
Lead Free Status	Contains Lead
Voltage - Input	8 ~ 16V
Current - Output	2.5A
Power - Output	8.25W
Regulator Topology	Buck
Voltage - Output	3.3V
Board Type	Fully Populated
Supplied Contents	Board Only
Utilized IC / Part	TPS40200
Frequency - Switching	300kHz
Outputs and Type	1, Non Isolated
Main Purpose	DC/DC, Step Down

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suppliers of TPS40200EVM-001 and PDF data of TPS40200EVM-001

Part Numbert	Mfg	Packt	D/C	Descriptiont	Qty	Company/Contact
TPS40200EVM-001	TEXAS INSTRU	.	08+	现货订货，全新原装	1	North Technology Co.,Ltd Contact:JOJO Tel:86-10-82637263 Fax:86-10-82639385 Email: jojo@northelec.com

TPS40200EVM-001 Datasheet

Symbol	Parameter	Test Condition	Min	Max	Unit
kl	Input Leakage Current	OVVINVCC		+2
ILO	Output Leakage Current	OV ,, VOUT " VCC SDA in Hi-Z		+2
lcc	Supply Current (ST24 series)	Vcc = 5V, fc = 100kHz (Rise/Fall time < 10ns)		2	mA
lcc	Supply Current (ST25 series)	Vcc = 2.5V, fc = 100kHz		1	mA
	Supply Current (Standby)	VIN = Vss or Vcc, Vcc = 5V		100	cCA
lccl	(ST24 series)	VIN = VSS or Vcc, Vcc = 5V, fc = 100kHz		300
	Supply Current (Standby)	VIN = Vss or Vcc, Vcc = 2.5V		5
ICC2	(ST25 series)	VIN = VSS or Vcc, Vcc = 2.5V, fc = 100kHz		50
VIL	Input Low Voltage (SCL, SDA)		-0.3	0.3 Vcc	V
VIH	Input High Voltage (SCL, SDA)		0.7 Vcc	Vcc +1	V
VIL	Input Low Voltage (PBO - PBl, PRE, MODE, WC)		-0.3	0.5	V
VIH	Input High Voltage (PBO - PBl, PRE, MODE, W )		Vcc - 0.5	Vcc +1	V
	Output Low Voltage (ST24 series)	IOL = 3mA, Vcc = 5V		0.4	V
VOL	Output Low Voltage (ST25 series)	IOL = 2.1mA, Vcc = 2.5V		0.4	V

TPS40200EVM-001 Price

SYMBOL	SIZE	TOL.	UNIT
H1	3.40	+0.30	mm
H2	1.20	+0.40/-0.20	mm
L1	3.20	+0.10	mm
L2	5.10	+0.30	mm
wl	0.45	+0.05/-0.10	mm
W2	0.50	+0.20/-0.10	mm
P	0.80		mm

TPS40200EVM-001 on stock

Silicon l'Jli\}:il

N-channel logic level TrenchMOSTM transistor PSMN004-25B, PSMN004-25P

Parameter	1101111RIA		Units	Conditions
PGM Maximum peak gate power	12		W	T, = Ti rnax, t " 5ms JJ'p
PG(AV, Maximum average gate power	3 0		W	Tj = Tj max, f = 50Hz, d% = 50
IGM Max. peak positive gate current	3 0		A	T, = T, max, t " 5ms JJ'p
VGM Maximum peak positive gate voltage	20		V	T, = T, max, t " 5ms
-VGM Maximum peak negative gate voltage	10		V	JJ'p
	TYP	MAX
IGT DC gate current required to trigger	180 80 40	120	mA	T, = - 400C Tj= 250C Max. required gate trigger/ cur- T ] = 1400C rent/voltage are the lowest value
VGT DC gate voltage required to trigger	2 5 1 6	2	V	which will trigger all units 12V T, = - 400C anode-to-cathode applied Tl= 250C T, = 1400C
IGD DC gate current not to trigger	6 0		mA	Max. gate current/voltage not to trigger is the max. value which
VGD DC gate voltage not to trigger	0 25		V	T ] = Tj max will not trigger any unit with rated VDRM anode-to-cathode applied