An alternate pi rotection method is shown in Fig. 2, where a si I current limit resistor is inserted in series with CX. Note that a small pulse width de- crease will occour however, and RX must be appro- priately increased to obtain the originally desired pulse width.
TPS60242DGKRG4 on stock| Bit | Description |
| 7 | 0 = Block read or block write operation, 1 = Byte read or byte write operation |
| (65) | Chip select address, set to '00' to access device |
| (40) | Byte offset for byte read or byte write operation. For block read or block write operations, these bits should be '00000' |
| |
If the PHY receives a link-on packet from another node, the C/LKON terminal is activated to output a square-wave signal. The LLC recognizes this signal, reactivates any powered-down portions of the LLC, and notifies the PHY of its power-on status via the LPS terminal. The PHY confirms notification by deactivating the square-wave signal on the C/LKON terminal, then enables the PHY-Iink interface.
