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TPS65030EVM-162 Price NOTES: 1. DiMENSIONS ARE IN IKICHES[MMl. 2. CONTROLLINC DIMENSiON: INCHES. A DIMrNSION DOES NOT INCLUDE MOLD F'LASH OR PROTRl_JSIONS, EITHER OV WHICH SHALL KlOT /\ EXCEED 0.008[0.203] /4\ LEAD DIMENSiON DOES NOT INCLUDE DAMBAR PROTRUSION. 5. MAXIMUM AND MIKllMUM SPECIFICA110NS AF+E A IKIDICATED AS FOLLOWS: MAX/Mihl PACKACE TOP DlkilENSION MAY BE SLIGHITLY SMALLER THAN BOTTOM DIMENSION
TPS65030EVM-162 on stock| Parameter | Absolute Maximum - |
| Max. Input Power 0.05 GHz 0.5 - 3.0 GHz | +27 dBm +34 dBm |
| Bias Voltages VEE Vcc Control Voltage 4 | -8.5V +5.5V -0.5V to Vcc +0.5V |
| Operating Temperature | -400C to +85aC |
| Storage Temperature | -650C to +1250C |
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| | | 7C235A-25 | 7C235A-30 | 7C235A-40 | |
| Parameter | Description | Min | Max | Min | Max | Min | Max | Unit |
| tSA | Address Set-Up to Clock HIGH | 25 | | 30 | | 40 | | ns |
| tHA | Address Hold from Clock HIGH | 0 | | 0 | | 0 | | ns |
| tc0 | Clock HIGH to Valid Output | | 12 | | 15 | | 20 | ns |
| tPWC | Clock Pulse Width | 12 | | 15 | | 20 | | ns |
| tSES | Es Set-Up to Clock HIGH | 10 | | 10 | | 15 | | ns |
| tHES | Es Hold from Clock HIGH | 5 | | 5 | | 5 | | ns |
| tDI | Delay from INIT to Valid Output | | 25 | | 25 | | 35 | ns |
| tRI | INIT Recovery to Clock HIGH | 20 | | 20 | | 20 | | ns |
| tPWI | INIT Pulse Width | 20 | | 20 | | 25 | | ns |
| tcOS | Inactive to Valid Output from Clock HIGH7 J | | 20 | | 20 | | 25 | ns |
| tHZC | Inactive Output from Clock HIGH7 J | | 20 | | 20 | | 25 | ns |
| tDOE | Valid Output from E LOW | | 20 | | 20 | | 25 | ns |
| tHZE | Inactive Output from E HIGH | | 20 | | 20 | | 25 | ns |
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